? semiconductor components industries, llc, 2013 december, 2013 ? rev. 3 1 publication order number: NB3U23C/d NB3U23C 1.2 v dual channel cmos buffer / translator description the NB3U23C is a 2 ? input, 2 ? output buffer/voltage translator for ufs (universal flash storage) in portable consumer applications such as mobile phones, tablets, cameras, etc. this dual channel cmos buffer accepts 1.8 v cmos input and translates it to 1.2 v cmos output. the device is powered using single supply of 1.2 v 5%. the NB3U23C is packaged in 2 ultra ? small 6 ? pin packages: the 6 pin sc70 and a 6 pin thin dfn package. features ? operating frequency: 52 mhz (max) ? propagation delay: 5 ns (max) ? low standby current: < 10 a at 1.2 v v dd ? low phase noise floor: ? 150 dbc/hz (typ) ? rise/fall times (tr/tf): 2 ns (max) ? esd protection exceeds jedec standards ? 2000 v human ? body model (js ? 001 ? 2012) ? 200 v machine model (jesd22 ? a115c) ? 1000 v charged ? device model (jesdc101e) ? operating supply voltage range (v dd ): 1.2 v 5% ? operating temperature range (industrial): ? 40 c to 85 c ? this is a pb ? free device see detailed ordering and shipping information on page 4 of this data sheet. ordering information marking diagrams sc ? 70 sq suffix case 419b http://onsemi.com 1 6 23c = device code m = date code* = pb ? free package (note: microdot may be in either location) *date code orientation and/or position may vary depending upon manufacturing location. 23c m vdd out1 out2 in1 in2 1 3 6 4 5 2 1 2 figure 1. simplified logic diagram 1 gnd udfn ? 6 mn suffix preliminary tbd m 1
NB3U23C http://onsemi.com 2 figure 2. pinout diagram (top views) 1 2 3 6 5 4 in1 gnd in2 out1 vdd out2 sc70 ? 6 package udfn ? 6 package 1 2 3 6 5 4 in1 gnd in2 out1 vdd out2 table 1. pin description number name description 1 in1 input clock signal ? channel 1 2 gnd power supply ground (0 v) 3 in2 input clock signal ? channel 2 4 out2 output ? channel 2 5 vdd power supply voltage 6 out1 output ? channel 1 table 2. attributes characteristic value esd protection human body model machine model charge device model 2 kv min 200 v min 1 kv min moisture sensitivity (note 1) level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 120 meets or exceeds jedec spec eia/jesd78 ic latchup test ii 1. for additional information, see application note and8003/d.
NB3U23C http://onsemi.com 3 table 3. maximum ratings (note 2) symbol parameter condition 1 condition 2 rating unit v dd supply voltage 3.6 v v in input voltage ?0.5 v i 2.5 v i d output current 25 ma t a operating temperature range, industrial ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm (note 3) sc70 ? 6 udfn ? 6 210 126 tbd c/w jc thermal resistance (junction ? to ? case) (note 3) sc70 ? 6 udfn ? 6 100 tbd c/w t sol wave solder 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 2. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and not valid simu ltaneously. if stress limits are exceeded device functional operation is not implied, damage may occur and reliability may be affected. 3. jedec standard multilayer board ? 2s2p (2 signal, 2 power). table 4. electrical characteristics (vdd = 1.2 5% v, gnd = 0 v, t a = ? 40 c to +85 c) symbol characteristic conditions min typ max unit didd power supply current (single channel switching @ 52 mhz) c l = 20 pf c l = 5 pf c l = 1 pf 2.5 1.5 1 ma power supply current (both channels switching @ 52 mhz) c l = 20 pf c l = 5 pf c l = 1 pf 5 3 2 ma i off standby current vi = v ih max or gnd; v dd = 1.2 v, no output load 10 a v ih input high voltage 0.65 * vdd 1.98 v v il input low voltage 0 0.35 * vdd v v oh output high voltage c l = 20 pf r l = 100 k 0.75 * vdd vdd v v ol output low voltage c l = 20 pf r l = 100 k 0 0.25 * vdd v c in input capacitance 5 pf f clk operating frequency range 0 52 mhz t pd propagation delay inx to outx c l = 20 pf, r l = 100 k 5 ns phase noise floor density (notes 4 and 5) c l = 20 pf r l = 100 k ? 150 dbc/hz additive rms phase jitter (notes 5 and 6) c l = 20 pf r l = 100 k offset frequency range: 50 khz to 10 mhz 0.15 0.25 ps dc output duty cycle (note 7) input duty cycle = 50%, min input slew rate = 1 v/ns 45 55 % tr/tf output rise/fall times 0.2 * v dd to 0.8 * vdd c l = 20 pf r l = 100 k 2 ns product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. white noise floor. 5. this parameter refers to the random jitter only. 6. the output rms phase jitter can be calculated using the following equation: (output rms phase jitter) 2 = (input rms phase jitter) 2 + (additive rms phase jitter) 2 7. measured with input voltage swing from 0 v to 1.8 v.
NB3U23C http://onsemi.com 4 figure 3. typical test setup for evaluation outx gnd inx c l = 20 pf r l = 100 k figure 4. typical phase noise plot at 50 mhz carrier frequency 1.00e+02 1.00e+03 1.00e+05 1.00e+07 1.00e+04 0 ? 20 ? 40 ? 60 ? 80 ? 100 ? 120 ? 140 ? 160 ? 180 offset frequency (hz) power (dbc/hz) 1.00e+06 ordering information device package shipping ? NB3U23Csqtcg sc ? 70 ? 6 (pb ? free) 3000 / tape & reel NB3U23Cmntbg udfn ? 6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NB3U23C http://onsemi.com 5 package dimensions udfn ? 6, 1.4 x 1.2, 0.5 case tbd issue o
NB3U23C http://onsemi.com 6 package dimensions sc ? 88/sc70 ? 6/sot ? 363 case 419b ? 02 issue y notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protru- sions, or gate burrs shall not exceed 0.20 per end. 4. dimensions d and e1 at the outermost extremes of the plastic body and datum h. 5. datums a and b are determined at datum h. 6. dimensions b and c apply to the flat section of the lead between 0.08 and 0.15 from the tip. 7. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 total in excess of dimension b at maximum material condi- tion. the dambar cannot be located on the lower radius of the foot. c ddd m 123 a1 a c 654 e b 6x dim min nom max millimeters a ??? ??? 1.10 a1 0.00 ??? 0.10 ddd b 0.15 0.20 0.25 c 0.08 0.15 0.22 d 1.80 2.00 2.20 ??? ??? 0.043 0.000 ??? 0.004 0.006 0.008 0.010 0.003 0.006 0.009 0.070 0.078 0.086 min nom max inches 0.10 0.004 e1 1.15 1.25 1.35 e 0.65 bsc l 0.26 0.36 0.46 2.00 2.10 2.20 0.045 0.049 0.053 0.026 bsc 0.010 0.014 0.018 0.078 0.082 0.086 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.65 0.66 6x dimensions: millimeters 0.30 pitch 2.50 6x recommended top view side view end view bbb h b seating plane detail a e a2 0.70 0.90 1.00 0.027 0.035 0.039 l2 0.15 bsc 0.006 bsc aaa 0.15 0.006 bbb 0.30 0.012 ccc 0.10 0.004 a-b d aaa c 2x 3 tips d e1 d e a 2x aaa h d 2x d l plane detail a h gage l2 c ccc c a2 6x on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NB3U23C/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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